Module libtegra::uart::UART_VENDOR_STATUS_0_0
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Bitfields of the UART_VENDOR_STATUS_0_0 register.
Modules
The entry in this field reflects the number of current entries in the RX FIFO.
This bit is set to 1 when a read is issued to an empty FIFO and gets cleared on register read (sticky bit until read).
The entry in this field reflects the number of current entries in the TX FIFO.
This bit is set to 1 when write data is issued to the TX FIFO when it is already full and gets cleared on register read (sticky bit until read).
This bit is set to 1 when the RX path is IDLE.
This bit is set to 1 when the TX path is IDLE.